unisim.backend.drake.tensor.DrakeHostBridgeTransferPlan¶
- class unisim.backend.drake.tensor.DrakeHostBridgeTransferPlan[source]¶
Bases:
HostBridgeTransferPlanOne stable Drake layout for explicit accelerator/CPU boundaries.
DrakeUni physics remains authoritative on CPU. Each semantic operation moves at most one contiguous packet, and CUDA transfers are synchronized on the caller’s current Torch stream. The initial profile excludes fixed variants, interval forces, reset randomization, and host pre-step callbacks.
- Parameters:
backend (
DrakeBackend)spec (
TensorIOSpec)
Methods
__init__(backend, spec)apply_reset(env_indices, qpos, qvel[, ...])Pack selected reset rows once, D2H them, and commit CPU physics.
close()Release transfer staging ownership without closing CPU physics.
Return full views after one packed selected-row post-reset H2D.
Return persistent tensor views after one packed H2D read.
step([nsteps])Run CPU physics with the tensor control staged by
write_control.write_control(ctrl)Stage one complete control tensor on the host.
Attributes
Return the immutable layout request used to compile this plan.
Return cumulative semantic transfer and synchronization counters.
- __init__(backend, spec)[source]¶
- Parameters:
backend (
DrakeBackend)spec (
TensorIOSpec)
- property spec: TensorIOSpec¶
Return the immutable layout request used to compile this plan.
- property transfer_stats: dict[str, int]¶
Return cumulative semantic transfer and synchronization counters.
- apply_reset(env_indices, qpos, qvel, randomization=None)[source]¶
Pack selected reset rows once, D2H them, and commit CPU physics.